The present invention relates to a resistance change nonvolatile memory device, a semiconductor device, and a method of operating a resistance change nonvolatile memory device.
In nonvolatile memory fields, there has been much research on flash memories, ferroelectric memories (Ferroelectric Random Access Memory; FeRAM), magnetic memories (Magnetic Random Access Memory; MRAM), OUM (Ovonic Unified Memory) and the like. As nonvolatile memories different from these related-art ones, however, resistance change memories (Resistance Random Access Memory; ReRAM) have recently been proposed. For example, a resistance change memory described in Non-patent Document 1 can write data by setting the resistance of a resistance change layer of a resistance change element in the memory cell by application of a voltage pulse. In addition, it can read data by measuring resistance in a non-destructive manner. This resistance change memory can be multivalued because memory cells have a small area. Therefore, it has a possibility exceeding the existing nonvolatile memories. In Non-patent Document 1, PCMO (Pr0.7Ca0.3MnO3) and YBCO (YBa2Cu3Oy) are used as the resistance change layer.
There have also been proposals on resistance change memories. For example, Non-patent Document 2 or Non-patent Document 3 proposes, as a resistance change element of a resistance change memory, a stacked structure obtained by sandwiching two resistance change layers between an upper electrode and a lower electrode. FIG. 1A and FIG. 1B are cross-sectional views showing the configuration of the major portion of the resistance change memory proposed in Non-patent Document 2 or Non-patent Document 3. FIG. 1A shows one of the memory cells of a resistance change memory 150. This memory cell is equipped with a control transistor 102 and a resistance change element 101 (1T1R type). FIG. 1B shows this resistance change element 101. The resistance change element 101 has a stacked structure obtained by sandwiching a Ta2O5 layer as a first resistance change layer 112 and a TiO2 layer as a second resistance change layer 113 between an upper electrode 111 and a lower electrode 114. The first resistance change layer 112 (Ta2O5 layer) and the second resistance change layer 113 (TiO2 layer) have film thicknesses of, for example, 10 nm and 3 nm, respectively.
The control transistor 102 for memory cell is formed in the surface region of a semiconductor substrate 140. The control transistor 102 is equipped with a gate insulating film 123, a gate 122 (word line), a drain 121, a source 124, and a sidewall 125. Contacts 104 are coupled onto the drain 121 and the source 124, respectively. The control transistor 102 and the contacts 104 are covered with a first interlayer insulating film 131. The contact 104 on the side of the drain 121 is coupled to a first wiring 103. The resistance change element 101 is coupled to the first wiring 103. A first via 109 is coupled onto the resistance change element 101. A second wiring 106 (bit line) is coupled onto the first via 109. On the other hand, the contact 104 on the side of the source 124 is coupled to a common line 108. The first wiring 103, the resistance change element 101, the first via 109, and the common line 108 are covered with a second interlayer insulating film 132.
Next, a bipolar type switching method of the resistance change element 101 having the above-described Ta2O5 layer/TiO2 layer (first resistance change layer 112/second resistance change layer 113) stacked structure will be described. The resistance of the resistance change element 101 in the initial state is 1 GΩ or greater. First, by applying a high voltage to (Forming) the resistance change element 101, a conduction path (filament) penetrating through the stacked structure is formed. This decreases the resistance of the resistance change element 101 (to 10 kΩ or less). This filament (conduction path) is presumed to be formed by the connection of oxygen vacancies in the Ta2O5 layer and the TiO2 layer and it shows an ohmic conduction mechanism. Next, switching from the low resistance state (On state) to the high resistance state (Off state) occurs by application (Off operation) of a negative voltage (Off voltage) to the upper electrode 111. As a result, the resistance change element 101 has resistance as high as 0.01 MΩ or greater (RH: Off resistance). In the Off resistance state, a tunnel barrier is formed in the TiO2 layer and it divides the filament to increase the resistance. The Ta2O5 layer keeps its stable state once the filament is formed. Next, switching from the high resistance state (Off state) to the low resistance state (On state) occurs by application (On operation) of a positive high voltage (On voltage) to the upper electrode 111. As a result, the resistance of the resistance change element 101 has resistance as low as 10 kΩ or less (RL: On resistance). Target values of the On operation condition and Off operation condition are desirably ±5V or less/10 μsec or less. Furthermore, Non-patent Document 3 reports that the resistance after Off operation can be multivalued by verification. Non-Patent Document 4 reports that an Off resistance value depends on the width of a tunnel barrier which has been formed in the TiO2 layer so as to divide the filament.
As related technology, Japanese Patent Laid-Open No. 2008-21750 (Patent Document 1; corresponding U.S. Patent Application: US2008048164(A1)) discloses a resistance change element. This resistance change element has a first electrode, a second electrode, and a resistance change layer and an insulating layer stacked between the first electrode and the second electrode. The insulating layer has a thickness of 0.5 nm or greater but not greater than 5 nm. The resistance change layer is a layer which can be changed among two or more states different in electrical resistance by applying a voltage or current between the first electrode and the second electrode. The resistance change layer is composed mainly of a transition metal oxide.
Japanese Patent Laid-Open No. 2009-21524 (Patent Document 2) discloses a resistance change element. This resistance change element includes a substrate, a lower electrode and an upper electrode arranged on the substrate, and a resistance change layer arranged between the lower electrode and the upper electrode. In this resistance change element, there are two or more states different in electrical resistance between the lower electrode and the upper electrode. In this resistance change element, a change from one state selected from the two or more states to another state occurs by applying a drive voltage or current between the lower electrode and the upper electrode. The resistance change layer has a multilayer structure containing two or more films made of an oxide or oxynitride of tantalum, each film having a thickness of 2 nm or less.
Japanese Patent Laid-Open No. 2009-135370 (Patent Document 3) discloses a nonvolatile memory element. This nonvolatile memory element is equipped with a first electrode, a second electrode, and a resistance change layer inserted between the first electrode and the second electrode and undergoing a reversible change in resistance, depending on an electrical signal sent between the first electrode and the second electrode. The resistance change layer has a stacked structure containing at least a first oxide layer composed of an oxide of a transition metal different from tantalum and a second oxide layer composed of an oxide of tantalum. The second oxide layer has a thickness greater than that of the first oxide layer.
Japanese Patent Laid-Open No. 2009-212380 (Patent Document 4) discloses a resistance change memory. This resistance change memory includes a resistance change element having a resistance change layer sandwiched between a pair of electrodes. In this resistance change memory, the resistance change layer has a film stack of a polycrystalline oxide film and an amorphous oxide film thicker than the polycrystalline oxide film.
Japanese Patent Laid-Open No. 2010-21381 (Patent Document 5) discloses a nonvolatile memory element. This nonvolatile memory element is equipped with a first electrode, a second electrode, and a resistance change layer inserted between the first electrode and the second electrode and undergoing a reversible change in resistance, depending on an electrical signal applied between these electrodes. This nonvolatile memory element undergoes a reversible change in resistance between the first electrode and the second electrode, depending on polarity-different electrical signals applied between the first electrode and the second electrode. The resistance change layer has at least a stacked structure obtained by stacking a first oxygen-deficient zirconium oxide layer which is electroconductive and has a composition represented by ZrOx (wherein, 0.9≦x≦1.4) and a second oxygen-deficient zirconium oxide layer which is electroconductive and has a composition represented by ZrOy (wherein, 1.9<y<2.0).
Japanese Patent No. 4469023 (Patent Document 6; corresponding U.S. Patent Application No: US2011002154(A1)) discloses a nonvolatile memory element. This nonvolatile memory element is equipped with a first electrode, a second electrode, and a resistance change layer inserted between the first electrode and the second electrode and undergoing a reversible change in resistance, depending on an electrical signal applied between these electrodes. This nonvolatile memory element undergoes a reversible change in resistance between the first electrode and the second electrode, depending on polarity-different electrical signals applied between the first electrode and the second electrode. The resistance change layer has a stacked structure obtained by stacking a second oxygen-deficient hafnium oxide layer which is electroconductive and has a composition represented by HfOx (wherein, 0.9≦x≦1.6) and a first oxygen-deficient hafnium oxide layer which is electroconductive and has a composition represented by HfOy (wherein, 1.8<y<2.0).
WO2008/038365 (Patent Document 7; corresponding U.S. Pat. No. 7,764,160(B2)) discloses a resistance change element. This resistance change element has a stacked structure including a first electrode, a second electrode, an oxygen ion transfer layer placed between the first electrode and the second electrode and capable of forming a low resistance path made of oxygen voids due to transfer of oxygen ions in the layer, and an oxygen ion formation promoting layer which is placed between the oxygen ion transfer layer and the first electrode while being in contact with the oxygen ion transfer layer.